LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;

ENTITY tb_controller IS
END tb_controller;
 
ARCHITECTURE behavior OF tb_controller IS 
 
    -- Component Declaration for the Unit Under Test (UUT)
 
    COMPONENT controller
    PORT(
         datain : IN  std_logic_vector(7 downto 0);
         dataout : OUT  std_logic_vector(7 downto 0);
         clk : IN  std_logic;
         rst : IN  std_logic;
         push : IN  std_logic;
         pop : IN  std_logic;
         mode : IN  std_logic;
         loadkey : IN  std_logic
        );
    END COMPONENT;

   --Inputs
   signal datain : std_logic_vector(7 downto 0) := (others => '0');
   signal clk : std_logic := '0';
   signal rst : std_logic := '0';
   signal push : std_logic := '0';
   signal pop : std_logic := '0';
   signal mode : std_logic := '0';
   signal loadkey : std_logic := '0';

 	--Outputs
   signal dataout : std_logic_vector(7 downto 0);

   -- Clock period definitions
   constant clk_period : time := 10 ns;
	
	-- Wektory testowe
	constant test_key : std_logic_vector(127 downto 0) := X"000102030405060708090a0b0c0d0e0f";
	constant test_data1 : std_logic_vector(127 downto 0) := X"00112233445566778899aabbccddeeff";
	-- test_data1 po zaszyfrowaniu: 69c4e0d86a7b0430d8cdb78070b4c55a
	constant test_data2 : std_logic_vector(127 downto 0) := X"0343747ab7cd787e87cb8eb8271273b1";
	-- test_data2 po zaszyfrowaniu: 8623d906018502bff22956efd244afc7
	constant test_data3 : std_logic_vector(127 downto 0) := X"aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
	-- test_data3 po zaszyfrowaniu: fbd49b091a38f87ad5c3ee2580ba414c
	constant test_data4 : std_logic_vector(127 downto 0) := X"48809481209380123981029381029380";
	-- test_data3 po zaszyfrowaniu: 25232a0586c6ac31363ad1a54c30efb3
	constant test_data5 : std_logic_vector(127 downto 0) := X"bcacb23d2871937328b3d8718bd28738";
	-- test_data3 po zaszyfrowaniu: f789e8d3f465a569ccf263992c422981
	constant test_data6 : std_logic_vector(127 downto 0) := X"c676c3767326873873162abba7ab7211";
	-- test_data3 po zaszyfrowaniu: 430c8e9dd0cb292e77cf014826200a36
	constant test_data7 : std_logic_vector(127 downto 0) := X"12121212121212121212121212121212";
	-- test_data3 po zaszyfrowaniu: 10faa5f9cb40f1a60f66da940e594c8e

BEGIN
	-- Instantiate the Unit Under Test (UUT)
   uut: controller PORT MAP (
          datain => datain,
          dataout => dataout,
          clk => clk,
          rst => rst,
          push => push,
          pop => pop,
          mode => mode,
          loadkey => loadkey
        );

   -- Clock process definitions
   clk_process :process
   begin
		clk <= '0';
		wait for clk_period/2;
		clk <= '1';
		wait for clk_period/2;
   end process;
 
   -- Stimulus process
   stim_proc: process
   begin
		rst <= '1';
      -- hold reset state for 100 ns.
      wait for 100 ns;
		rst <= '0';
      wait for clk_period*10;
		
		mode <= '1'; -- koder
		
		-- Ladowanie klucza
		loadkey <= '1';
		for i in 0 to 15 loop
			datain <= test_key((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test1
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data1((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test2
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data2((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		wait for 100*clk_period; 	-- dokonczenie obliczen
		wait;
		
		-- Ladowanie danych test3
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data3((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test4
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data4((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test5
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data5((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test6
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data6((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
		-- Ladowanie danych test7
		loadkey <= '0';
		for i in 0 to 15 loop
			datain <= test_data7((127 - (i * 8)) downto (127 - ((i + 1) * 8 - 1)));
			push <= '1';
			wait for clk_period;
			push <= '0';
			wait for clk_period;
		end loop;
		
      wait;
   end process;

END;
